At present, the dominant methods for fabricating liquid crystal display devices (LCDs) and other flat panel display devices are the methods based on amorphous silicon (a-Si) thin-film transistor (TFT) technologies. Using these technologies, high quality image displays of substantial size can be fabricated using low temperature processes. As will be understood by those skilled in the art, conventional LCD devices typically include a transparent (e.g., glass) substrate with an array of thin film transistors thereon, pixel electrodes, orthogonal gate and data lines, a color filter substrate and liquid crystal material between the transparent substrate and color filter substrate. Other flat panel display devices include plasma display panels (PDPs), electroluminescent displays (ELDs) and field emission displays (FEDs). Many of these flat panel display devices have matrix type wiring structures which include a plurality of gate lines extending in one direction across a display substrate and a plurality of data lines extending in another orthogonal direction across the display substrate. However, because defects in these matrix type wiring structures can cause an entire column(s) or row(s) of display pixels to become inactive in response to gate line and data line driving signals, techniques to provide built-in repair capability have been provided.
One such technique to provide built-in repair capability is disclosed in U.S. Pat. No. 5,729,253 to Na et al. entitled "Liquid Crystal Display Substrate Having Repair Lines, assigned to the present assignee, the disclosure of which is hereby incorporated herein by reference. Another technique is disclosed by FIG. 1. In FIG. 1, a display substrate 1 is provided which has an active display area "A" therein. Gate line pads 7 and data line pads 9 are also provided on the substrate 1 and these pads are provided outside the display area "A". Each of these gate line pads 7 has a gate line 3 coupled thereto and each of the data line pads 9 has a data line 5 coupled thereto. A main repair line 11 which extends around the periphery of the active display area "A" is also formed on the substrate 1 to provide a repair function, if necessary. For example, in the event a break (illustrated by ".apprxeq.") is formed in one of the data lines 5, respective connections (illustrated by ".DELTA.") can be made to the main repair line to remedy the break by coupling both ends of the defective data line 5 to the respective data line pad 9 via the main repair line. As will be understood by those skilled in the art, a portion of the main repair line 11 is also disconnected (illustrated by "x") to reduce parasitic capacitance and RC delay associated with the repaired data line.
Referring now to FIG. 2, another conventional technique for providing built-in repair is illustrated. Here, a display substrate is provided having a central active display area "A" and a peripheral area "B". Data lines 5 and gate lines 3 extend across the display area "A", as illustrated. Data line pads 9 and gate line pads 7 are also provided in the peripheral area "B". A source PCB substrate 21 and gate PCB substrate 23 are provided and a main repair line 11 is provided. This main repair line 11 extends across the peripheral area "B", the gate PCB substrate 23 and the source PCB substrate 21. As illustrated, the main repair line has first portions 14, second portions 18 and third portions 16. Each of these first, second and third portions is capable of providing a repair function to a respective block of data lines 5. For example, first portions 14 can be connected (shown by the connection ".DELTA.") to a defective data line in a respective block. U.S. application Ser. No. 08/708,224, filed Sep. 6, 1996, entitled "Liquid Crystal Display Having A Repair Line", assigned to the present assignee, the disclosure of which is hereby incorporated herein by reference, also discloses prior art display devices having built-in repair capability.
Unfortunately, both the device of FIG. 1 and the device of FIG. 2 may incur large RC delay and parasitic capacitance penalties when the repair function is provided. For example, with respect to the device of FIG. 1, if the number of data lines is 3072 and the 1536.sup.th data line is open, the parasitic capacitance associated with the repaired data line will be 3072C, where "C" represents the capacitance associated with an overlap between the main repair line 11 and a data line 5. With respect to the device of FIG. 2, a large number of data blocks may be provided to reduce RC delay and parasitic capacitance, however, the use of a large number of blocks will unfortunately require the use of larger PCB substrates 21 and 23 to support the large number of main repair line portions.
Thus, notwithstanding these above described techniques at providing built-in repair capability for display devices, there continues to be a need for improved display devices having built-in repair capability that can be highly integrated, have improved RC delay and have reduced parasitic capacitance.